Designing a Logic State Analyzer for calc repairs



#16

Hi all.

Some may consider (parts of) this post off topic. To those people I would say respectfully: keep replies constructive and on-topic please (!)

I have a few longer term projects which a few here may find interesting given this is such an active technical community.

The relevant one is a cheap Logic State Analyzer which can be used to debug logic faults and observe the execution of code, on machines from a hp 9810 all the way up to the latest equipment.

These somewhat exotic machines range from expensive to very expensive and hobbyists don't normally have access to one. Some here are fortunate to work for firms where such equipment is accessible, or perhaps they actually own one.

Tony Duell mentioned using one in a recent post. I designed and built one from a scraped arcade video game in '87 when I was 23. Now I'm doing a much improved revamp with modern components.

I had intended to make this thing to do my expansion work on my favourite toy, the 41. In my getting involved in the forum, doing the early calc. dev. work and making my clonix clone etc. other projects and commitments were shelved and now they must have some time devoted to them as well, since I have a copy of Diego D./ John I.s rom emulator running, on which I shall build to "push the envelope" as it were. Some of the code needs work.

Anyone interested can look at my website in a few days to a week where I'll have sketchy details posted (I am re-organising my pages since my allowed 10 MB of space is a bit tight...)

The machine will run under DOS from a parallel printer port and is a general purpose machine for logic hardware / firmware debugging. Many here may find it helpful in exploring the further use and repair of their machines and also in writing machine code for controlling physical devices.

Constructive feedback is welcome. If anyone wants to bitch to or about me they have the option to send abuse to my private e-mail address. That way this forum will not be cluttered with irrelevant venom. Readers don't ask for it.

Reading over a recent thread (everyone knows which one) leaves me feeling a mixture of anger, annoyance, sadness and disgust...
except for when I read what my supporters have written; thanks guys! The support from you people and the possibility I can help others are the only reasons why I still bother to post.

"Not impressed"

Don W

donwallace63@yahoo.com.au http://donwallace.customer.netspace.net.au

P.S. To Whom It May Concern: This is NOT a sales pitch, oblique or otherwise.


Edited: 8 Oct 2005, 4:29 a.m.


#17

Hi, Don; good reading your posts here.

About the logic analizer: I´ve been doing some research on this subject because I want to have one single, low-budget logic analizer. When I had the need to follow some signals, I borrowed a four-channel scope from a friend of mine and used it. Not the best tool, but it helped me when no more than four lines should be used. In some cases, I used external logic (some AND/OR gates) to combine some lines... at least I could see where I had the final combination, though.

After a while, I thought it would be better in my case having an acquisition gate+memory buffer, either a FIFO, a RAM or even a fast controler to handle data, and a suitable software running in an old Linux-based PC to capture data stored in the above mentioned acquisition gadget and turn it into visible data. Control might be shared with the PC software and the local triggering capabilities of the acquisition gadget in order to enhance capture abilities.

Using an existing PC reduces hardware costs, but demands software development. I was once told by a contributor that some suitable development platform exists that help developping control software. I though of using TK/GTK to write the graphics interface and some small C/C++ routines to capture data trhough I/O connection (USB? RS232? Printer port? Custom IO card?) and build a data file to be read by the TK/GTK to build the instrument viewing window.

I tested just a few experiments my own prior to try some existing capture designs so I could, at least, have a reference, but I did not go too far. I know I have the knowledge and skills to go ahead and get to a final working prototype, but I lack available time. What do you think?

Best regards.

Luiz (Brazil)


#18

Hi Luiz,

About the Logic State Analyzer (LSA)

Well it's really great that you are interested in this sort of thing.

I'm pretty out of date with "modern" stuff like USB. Meindert
woke me up to FDTI's one chip USB interface (with drivers!) which is exciting and something I will play with and use eventually.
Maybe sooner than later!

My opinion is that for me the simplest interface is the printer port. I plan to adapt and extend a very simple design I devised which worked fine using (very old!) 6551 cmos dual port ram.
I won't be using dual port RAM in the modern design.
In data acquire mode the ram is addressed in sequence with a cmos counter and written to from the circuit nodes under test.
In data playback mode you have the PC step the LSA address generator counters through the ram locations and read the bits you are interested in into the PC.

ASIDE:
This can also be very simply done in hardware if you have a basic oscilloscope to display the signal. I am a bit torn over whether to bother to also build a very simple LSA which just displays on a 'scope because you can't directly display HEX code easily... just a timing diagram type of display. But for tracing through logic faults like Tony mentioned it would be great for people working in an "advanced hobby" setting where the ultimate (translation of the hex code into assembler mnemonics) isn't required...
No mucking around on the PC doing the "acquire/store/display quickstep". Also good for quickly seeing what going on in a design you are doing.
ASIDE ENDS:

The only thing you need on the PC software side is to flip bits and write bytes to a few latches (output) in the printer port and read the input latches into some array, it's so simple. CMOS analogue multiplexors are controlled to access different blocks of ram or different bits (you can read five at a time even with very old printer port logic, a byte at a time with any modern EPP port).

This approach is primitive but perfectly adequate, simple to design and can easily be expanded.

My next favourite interface is RS232 as you still have bit mode control of lines.

USB has the advantages/disadvantages of being BLOCK mode and that's why I'm not so interested in using it at this stage. Also, the amount of data we are talking about is quite small.

On a related topic: eramco rambox revisited:

You may already know about it, but there's a new very simple CMOS logic block out which has a serial input and a byte-wide parallel latched output. The 74HC595 is very cheap and fairly fast, fine for some of the interface hardware to the 41 in a modern version of an eramco type rambox. One can easily use two of these to generate latched hp41 address data from the 41's ISA bus. It's only good to about 6.5 volts though so it's unusual CMOS logic. Ok for the 41 which runs it's regulated power bus at 6.2 volts.

A 74HC595 can also be used to convert an incoming serial data stream to byte wide parallel data for writing into conventional memory.

As people can see I am open with this info and only secretive/hesitant about stuff which I can't properly explain yet. Bad information is worse than no information sometimes...

Don W


#19

Don and others,

I have created a LSA with a single chip USB interface and a level shifter for the HP41. This was totally painless in hardware with a commercial DIL module of around EUR 30-40 and cost me about 2 evenings in software. No memory, no counters, just send ISA, DATA and SYNC in real time to the PC and dump it in a big file that can be post processed and searched.
It gives a full trace of everything happening on the HP41 bus as long as it is in sync with one of the CLK01 or CLK02 lines. Plenty of extra signals for tracing external hardware.
At my work we have the DigiView commercial LSA for USB, and I really would not bother making one myself if I needed the datarates. For developing the MLDL2000 I could trace all I wanted with a scope and my 'own' USB LSA. Again I have to credit Eric Smith for the original idea of using the FTDI chip as a LSA. Eric has been able to use this device for dumping almost all HP calculator ROMs.

USB is not really block mode only, it is just more efficient when using blocks, and that is what my HP41 analyzer uses. A parallel port is limited in speed, and difficult to program on bit level without the right drivers. Besides, I have my PC onder the desk, and a USB hub on the desk, which makes cabling with a USB device much easier (and gets power from it as well). Any bitbanging through USB or a parallel port will seriously suffer from lousy performance. The FT2232C chip from FTDI will give you serial protocols and bitbanging-like functions at very high speed with an easy software interface. I really recommend studying this chip before starting to contemplate the use of 'good old' 40xx CMOS os 74xxxx TTL chips for anything else then level conversion.

A future addition the the MLDL2000 will offer the possibility to do HP41 signal tracing. It is designed to do this in hardware, it is just a matter to implement the firmware and software for it.

I appreciate your opennes. That is how I finally succeeded to build the MLDL2000, with the help of this Forum. It is important to think out of the box, and look at new technologies. To succesfully implement the MLDL2000 I had to learn to write VHDL, program a USB interface and make PCB's for SMD devices. All exciting new stuff!

Good luck with developing your LSA and your RAMBOX!

Meindert


#20

Hi Meindert.

Thank you for a really interesting, informative post.

I didn't know things were that easy! I will definitely check out those FDTI chips!

Cheers,

Don W

#21

A variety of kits and PC instruments are available. Here is a very cheap example ( I haven't tried it):

http://www.oricomtech.com/wst100.htm


#22

Thanks for the info Gordon. Nice to know you are interested in this stuff.

I note that the BITSCOPE which started out as a hobby type project in 2000? is now a fully fledged system. It's pretty cool too...

DW


#23

Here is one to try if you like DIY, or the aticle could give you some ideas to design your own.

http://alternatezone.com/electronics/pcla.htm


#24

Hi Gordon,

Excellent link, thanks. A REAL PITY that guy hasn't got
the programming files for those 1016 chips. That's the engine.
I guess one could recreate them?

Sheesh...

DW

#25

With cheap FPGA/PLDs there's a few cheapie-but-useful logic analyzers on the market. Some of these offer dig scope functionality too...

http://www.tech-tools.com/dv_main.htm
http://www.bitscope.com
http://www.usbee.com/
http://www.dynoninstruments.com/

The DigiView from TechTools is particularly cool because it offers 'transitional timing'. Many/most logic analyzers just load states into memory as the clock line wiggles - even if there's no change in state. Thus, memory can fill quickly if you're looking for, say, a glitch in a slowly changing environment and could take many capture setups and a closely-constrained test environment.

Transitional timing L.A.s only enter a new state record into memory if there's a state change. If one state lasts thousands or millions of clocks, there's still only one record stored in capture memory. This effectively magnifies the LA capture memory by millions of times and allows extended or repeated test runs that would almost instanly fill capture memory of typical L.A.

[BTW years & years ago I built a capture device to do reverse engineering of automotive engine control firmware. It used 256K x18 of expensive x9 wide fast FIFO chips (having internal dual-port RAM structure), with 2 address range filters (settable with DIP switches, using 74F521? addr comparators) ahead of it. With appropriate filtering and connected to a PC thru a fast parallel port and some DOS software, one could see 'memory movies' of ROM data accesses and/or record data accesses and external measurements to correlate firmware behavior w/outside world.
(Those fast dualport FIFOs were REALLY expensive in 1993, esp in single-unit quantities.)]

One could build a nifty capture device these days... maybe 32 bits wide state w/32bit wide timing value per state, so 64 bit records wide. Use a fast PLD for multiple addr range comparisons at the front end. It also monitors change of state - each new 32 bit state resets a counter; when the state changes, the prior state and its clock-count duration are recorded into fast DP RAM or FIFOs. On the other side of this RAM/FIFO bank is a CPU+ USB2.0 or 1394 to squirt it to the PC.

However this may not be worth it as you can get the boxes listed above for around $500, and which will do much of what you want - and that money works out to 6-12 hours of work for avg electronic folks- compare that to your time to design/build/debug/provide software for a design of your own creation.


Bill Wiese

San Jose, CA USA


#26

Hi Bill,

Well, that post of yours was REALLY interesting...

Transitional triggering is an area I had found frustrating due to the increasing complexity required to do the instrument. But you are right, it's nearly too important not to implement.

Very interesting design you did. It would have been worth it's weight in gold. Like the info in your post.

You and Meindert have certainly got me thinking...!

Don W


#27

Ooh, this is pretty nice, and has 'transitional timing' concept (called 'compression')...

http://www.pctestinstruments.com/index.htm

$379


Bill Wiese

San Jose, CA USA

#28

I try to never build anything that I can buy. I have picked up a few nice logic analyzers on Ebay for real cheap. Not current state of the art, but far more capable than what is needed to hack around a 30 year old calculator.

#29

I have an old HP logic analyzer here, a 1610 I believe, that someone gave me a few years ago. He said it worked, but I've never used it to even verify. He works at JPL, and it sounds like he got it free from there just because it was so slow compared to the newer ones. I believe it's 10MHz, which would be plenty good for developing HP-41 products. If someone wants it, they're welcome to it. I'm in Whittier, California (about 20 miles east of downtown L.A.). It'll be free if you come pick it up; otherwise the shipping charges for this size and weight will be pretty high. I offered the logic analyzer on another forum and a fellow up in the Sacramento area claimed it, but by the time I found a box for it and was able to pack it up, I couldn't get hold of the man again to tell him how much shipping would be. IIRC, the box was too big for the post office to handle.


#30

Thanks for all the great feedback everyone.


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