The current HP microcode reader emulates an ACT or CTC and generates "HP word cycles" by software running on an old 100 Mhz PC which I keep in my lab. Advantage: no delay loops needed, it is already slow enough ;-)
The software is written in C and debugged under Linux, then transported and recompiled on the DOS box.
The current hardware options are twofold:
For Woodstocks / Classics, desolder the ROM chips and plug one each into a simple circuit providing power and level translators.
For Classics, desolder just the CTC and hook the reader to a few CTC pads and by microhooks, to a few holes on the main board. The mainboard itself provides the -12V/+6V power and the clock signal level translation.
The disadvantage is: some desoldering needed. But with professional tools and some skills, absolutely no traces need to be cut (I would never do such damage to any of my HPs) and after the chips are resoldered and in place again, and the board cleaned from flux residues, we still have a perfect HP mainboard without any damages.
For the Classics, desoldering the 16 pin ROM ceramic packages or the 10 pin TO cans proved to be too risky, so I reengineered the approach to desolder just the CTC. In the unlikely event that the CTC is damaged during the soldering process (i.e. heat and mechanical stress), a replacement CTC can be salvaged from lowly HP35s or 45s.
For Spice, I still don't have written any reader software. And I still lack a HP27 to see which logic / clock levels would be needed for these early NMOS HP chips.
This is work under progress. I have no doubt it will be of great benefit to the HP user community and schematics and software will be made available to the public domain in due time. First, I must have absolute confidence that the approaches and techniques chosen are sound and foolproof.
Volunteers may contact me under the email given above.
Regards,
Bernhard