Hungry HP42S



#8

Is it normal? A set of fresh batteries last ondy 2 weeks with normal use?

You masters of capacitors, resistences, diodes and others strange things that are hungry of energy are my only chance of solution of this problem. ;^)

Thanks in advance.

Pio


#9

FWIW, a 42S should consume approximately 2 ma with a key down, 300 ua in operation and about 5 to 10 ua in power down.

With daily use, a set of batteries should last several years in a Pioneer. There are two possible explanations for your problem:

1) Internal corrosion causing the high power consumption.
2) A bad processor.

For 1) There is one solution: Clean it.

For 2) There is one solution: The replacement of the logic board due to the construction methods used by HP (tape automated bonding). You can't replace the processor, just get yourself a complete replacement logic board from another 42S. Many times more easily said than done I'm afraid.

Edited: 1 Mar 2005, 7:44 p.m.


#10

I had a 42S in for repair that flattened batteries overnight, and like you I thought it would be the processor chip. But I (or more exactly) the owner was lucky. There's a 100uF capacitor across the battery (presumably to maintain continous memory when you change the batteries) and it was leaking. Althought it's a surface-mount part, it's not hard to desolder and solder in a new one.


#11

Alas, mine had a good cap and a bad processor...

#12

If it is indeed a bad CPU, can the rom chip be moved over to a Hp17Bii to salvage a good ROM onto a lower valued Hp?

Hardware wise they are identical (aside from a timing circuit for a clock).


#13

The ram is external in the 17b/27s/42s, not the rom. Its a masked rom processor chip :(

#14

Alas the ROM and processor are the same IC (which also contains the display and keyboard interfaces). The only other chip in the machine is (standard) RAM chip.

However, there is a way to make the 42S (and therefore, I assume the 17B-II) processor run from external ROM. HP development machines had a socket on the back which held a standard EPROM. From what I remember (and it will take me some time to find out), you tie one pin on the processor chip to one of the power lines to disable the internal ROM, then hang an EPROM off the address and data lines, with one more pin of the processor being the chip-enable line.


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