The "20" series actually had two stages: in the first, the HP 21, 22 and 25 were launched, and none had the so-called "continuous memory", nor CMOS circuitry. / In the second, the HP 25C, and the 19C & 29C do had "continuous memory" (CMOS battery-backed RAM). / The HP 27, nonprogrammable had no continuous memory; it may be regarded as sort of an intermediate generation between the two stages. The HP67 belongs to this timeframe. / The original HP25 had a RAM chip with 16 registers, each for 7 bytes of memory. Nine registers were assigned for data (memories 0 to 7) and Last-x. The remaining seven registers were used for the 49 programming steps, where each "keystroke phrase" (also called "merged keystrokes"; for instance STO + 5) was converted into a byte (there are less than 255 keyboard phrases possible in an HP25). / Moving only that single chip to CMOS allowed the -25C to keep ONLY that data and program steps when turned off, the stack registers were lost without power. Presumably the stack was on the CPU chip (non CMOS), and that may be why the HP21 could do without the RAM chip. / Putting a second CMOS RAM chip on the HP29C doubled the program steps to 98 (strange number, if not explained this way), and added more memory registers. Only some data registers were non-volatile, and it seems that the X register was mapped to the continuous memory. / The opcode count was kept below 255, despite the extra functions available on the HP29C, since label addressing and indirect addressing for some registers freed enough opcodes. In the HP67, the display control via a DSP instruction, and the P S register bank swap instruction helped that same end: No more than 255 opcodes! / By the way, the fact that the HP67 was codesigned with a printing sister model (HP97) may also be a factor for not implementing Continuous Memory on those calculators. / I think that the 16 register x 7 bytes CMOS RAM chip, pioneered on the HP25C is the same (or very similar) to the RAM chips used on the HP41C: This calculator had a new, full CMOS design; using 5 CMOS RAM chips: four for data registers or programs (with a movable boundary set by the SIZE instruction), and the fifth used for the stack, alpha register, flags, program counter, subroutine return addresses, and general housekeeping). The external memory modules for the HP41C added four RAM chips each, allowing for a maximum of 320 registers with four external modules. / THe HP41C was a fully "power-aware" design, in which the display is the only part of the calculator that is using power when the calculator is "on" (actually it is in a sort of standby state). The CPU and other parts do actually work only while a program is running or while a calculation is being done (run state). The "off" state is described as "sleep mode". / When the CMOS ICs stepped to 64 registers of 7 bytes each, the HP41CV was introduced, with 5 chips of 64 registers each for programs and data and one 16 register chip for housekeeping. At the same time, a QUAD module was introduced for the standard HP41C, allowing it to reach the maximum 320 registers while occupying only one expansion port. / You may consider me a nostalgic person, but I have very fond memories from the times when individual bytes mattered; instead of being counted "by the giga" as in the current years!
