41 User Memory vs System Memory


Hi All:

I've been reading the HEPAX2DD manual and it talks about user memory and system memory. In a previous posting user memory was described to be like a peripheral and does not fit in the 41C system addressing space. The following quotes are from the HEPAX2DD Volume 2 PDF.

HP-41C memory modules and Extended Memory modules are addressed to the user memory area, so they will not take up any space in the system area either. These modules are also known as system addressed devices. (just like the TIME module, HP-IL module, etc.)
There are 1024 register addresses, but some of these are used for
housekeeping, stack, ALPHA register, etc. The user is left with 919
registers of main and extended memory. Since there are only 1024
addresses, there is no way of expanding user memory further.
Okay, that makes sense. But here is where I start getting confused.
User memory registers are physically grouped in blocks of 16 registers. One user memory register is active at any time, and the block that contains this register is the active block. You select the active user memory register with the RAM SLCT instruction.
When you select a peripheral unit (e.g. the display), you must deselect the user memory. This is done by selecting a non-existent RAM chip using the RAM SLCT instruction with 0l0h in C[2:0]. If you forget this, your HP-41 will almost surely crash.

This sort of makes sense to me as the status registers are a block of 16 registers at the beginning of user memory. My question is how does the 41C address user memory? Is it switched into system space and then deselected when done? Does user memory have a separate, secondary addressing space from system memory? I'm accustom to flat memory spaces like a 6502 so switching in and out of user memory doesn't make sense to me.

Help, I am so confused!



Hi Gerry,

I think the key of your question is mainly (although not much detailed) explained in the post you've referenced...

In a previous posting user memory was described to be like a peripheral and does not fit in the 41C system addressing space.

Which I think is this thread.

The "user RAM" organization in 16 register blocks, (sometimes called "chips", since they were physically different silicon chips in the original HP-41 design, and in the 82106A Memory module) is relevant only when/if you're about to write M-code programs. Otherwise it is completely transparent from the user's point of view.

In M-code, you need to follow the "rules":

- RAM is a peripheral.

- Only one peripheral should be active (selected) at any given time.

- In order to "talk" to a non-memory peripheral, RAM must be de-selected first by *selecting* a non existing RAM chip i.e. h'010.

The M-code gurus out there can provide a more detailled answer for sure, hope this helps meanwhile.

Cheers, from a, temporarily one-handed, hardware guy...


Edited: 28 June 2012, 9:25 p.m.


I don't like (or particularly even understand) their use of the terms "user memory" and "system memory".

The Nut architecture has two address spaces, ROM of up to 64K 10-bit words, and RAM of up to 1024 56-bit words.

The ROM is divided into 16 4K pages, of which originally pages 0-2 were the mainframe ROM, 3 was reserved for possible expansion, 4 was reserved for the factory diagnostic ROM, 5-6 were reserved, and 7 was reserved for the printer ROM. Pages 8-F were allocated in groups of two to the four expansion ports. Later page 5 was allocated to the Time Module, page 6 to HP-IL mass storage and control, and in the 41CX, page 3 to CX extended functions. Also at around the time of the CX bank-switched ROMs were introduced.

While HP never offered any products that use the ROM address space for anything but actual ROM, there were third-party offerings such as MLDLs and the HEPAX that put RAM or EPROM into the ROM address space. As far as the normal 41 firmware is concerned, though, it still acts like ROM.

The RAM has a fixed address space with no bank switching, however, at any given time at most one block of 16 registers is selected. This is because when the RAM select instruction is given, there are some access instructions that will read or write that specific address (one register), and others that can read or write any address within the same block of 16 registers.

000-00f  status registers (stack, ALPHA, etc.)
010-03f nonexistent (010 MUST!) select 010 to deselect all RAM
040-0bf extended functions module (built-in for 41CX)
0c0-0ff base 41C memory
100-1ff up to 4 memory modules, or 1 quad mem (built-in for 41CV, CX)
200 nonexistent (MUST!)
201-2ef extended memory module
2f0-2ff nonexistent
300 nonexistent
301-3ef extended memory module
3f0-3ff nonexistent (MUST!)

Locations 010 and 3f0-3ff MUST be nonexistent because there are code sequences in the ROMs that depend on all RAMs deselecting when these addresess are selected. In particular, it is common to select a peripheral chip at an address such as fd by loading the C register with 3fd then doing a RAM select and a peripheral select. The peripheral only uses 8 bits of address, so it ignores the "3" in the "3fd".

Location 200 MUST be nonexistent to prevent the mainframe ROM from believing that there is normal memory at 200 and above. This would cause problems because the code was not written to deal with it, so for example there are not enough bits in compiled GTO and XEQ instructions to deal with larger main memory.

In principle there is no reason why locations 2f0-2ff and 300 couldn't be used, but since the same extended memory module is addressed in the 2xx or 3xx range depending on which port it is installed into, they left those locations out.

The RAM chips only use 10 bits of address, so generally it is not possible to use addresses above 3ff.


Thank you, Diego and Eric for taking the time to share your unique knowledge on such an esoteric topic. I will do some more reading on the 41C structure but I now feel I have a clearer understanding of the Nut architecture and how it handles RAM and ROM.

It does make me wonder Monte went through to build the NEWT processor in the 41CL with it's larger memory space for multiple RAM images. The MMU must be a work of art! :) (at least to us geeks)


Edited: 29 June 2012, 1:50 p.m.


The MMU *is* a masterpiece, and the transparent way it operates is nothing short of wonderful. It´s like having dozens of 41CX´s within the 41CL, all ready to fire at the mark. So far we´ve just mimic´d the Classic 41 world, perhaps extendng it a little - but there´s a world out there to go beyond it.

It somehow reminds me the Analog vs. Digital photo cameras, certainly backwards compatibility was the goal (aperture, speed, ISO settings, etc.) but to what extent is the heritage a hindrance? HDR, frame format.... can´t lead with that but that´s where the innovation is.

Let me mention one example - brought up by Monte himself. We regard bank-switching as state ot the art but the MMU allows dynamic block switching without the quirks and limitations of the traditional BS scheme: unlimited number of "banks", using FOCAL or MCODE alike, etc.

Here´s another one: a set of HEPAX FileSystems each comprising as many pages as required (obviously up to 9), selectable from a central dispatcher... multiple calculators in one.

Last one: get more ROM space supported by the OS, and since we´re at it, enhance the OS itself. If the CL had come out in 1984 (saving the technical impossibility) there would have never been any other HP or any other calculator ..

Just my opinion, of course.


I'm no expert in HP41 and maybe this is a little off-topic in this thread, but when I read all this discussions and developments around a, let's say, platform more than 30 years old I can't help thinking of the people that create the system. Now there are possibilities they even couldn't think of but the capabilities, or the simplicity, or I don't know exactly what, present in the 41's made possible all the products that still nowadays are being built. Maybe as Ángel Martin said “...there´s a world out there to go beyond it.” Monte's work is the beginning of other era but I find astounding the base is a so old design. So, it must be really good to be worth the time spent by Diego Díaz, Mendert Kuipers, Monte Dalrymple and others I'm not aware of, developing pieces of hardware to work with it.

This is just a little acknowledgment on my part for the work of everyone related with the HP41, from the original designers to the people still working on it, be on software or hardware.


I would add that the NEWT processor in the 41CL supports register addresses 400-FFF. Of course there isn't currently any software that can take advantage of that fact...

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