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No questions about SRAM data retention under low-voltage condition (is it the equivalent to the brown-out term currently used in some u-controllers?)
It's just the minimum voltage where a guarantee can be
comfortably made,
the state of a memory cell will be retained. Actually that
2.0V is rather pessimistic and I'd expect dropout is probably
considerably lower.
Recall the shameless "HP over-engineering to a fault",
where empirically NUT silicon has such a
low dropout voltage it manifests as somewhat of a comic
problem. Intentionally trying to trigger a power cycle
reset via cell removal often requires a coin, paper clip,
or similar unholy procedure to short the power rail.
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what actually amuses me is the way to deal with that. If the processor is not designed to work under the same circumstances, considering also that no operation was attempted while the batteries where 'down', then a [ Memory Lost ] might also be 'ordered' even if memory contents were OK. So, not even the memory chips work with low level voltage, the HP42S processor have also been designed to follow it. And that's what I was wondering about.
I'm uncertain exactly what is used to ensure integrity in this
case.
But a systems approach will take the processor into reset
upon entering a brownout, a reasonable margin before erratic
operation could occur. And when in reset, electrically the
memory control (essentially chip select and/or write enables)
of the processor will be designed to remain inactive well
past the minimum dropout voltage of the associated memory.
The firmware could detect the CPU has come out of an
electrical reset and flag the condition as "Memory Lost".
The integrity of RWM data however would best be validated
with a wide CRC. I don't believe the latter occurs, but
I haven't examined the firmware specifically for this either.
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You mentioned the low leakage tantalum and silicon capacitors: chances are that defective components or cold soldering might also be the cause of the memory loss while changing batteries in some units.
Given the claim battery removal causes a rapid power reset,
I'd expect a bad solder joint and/or bad bypass capacitor.
Otherwise if the leakage leakage load was that great I'd expect
short battery life to be a more obvious problem.