HP-71B FRAM Extension: an update



#7

hi all,

still working on my HP-71 FRAM extension, i've gained some progress so far:

1) PEEks, POKEs, burst reads and writes are working now.

2) FRAM can be segmented into 16 individual blocks of 2kB to 32 KB each.

3) an additional feature to swap 64kBytes from $30000 into the ROM address space is working, too.
so, theoretically, there is an upgrade path from 1BBBB to 1CDCC (or anything you poked into $30000 and above) by simply setting a jumper...

4) and the best news: the complete hardware will most likely fit into one regular memory module (still working on the layout, it *is* cramped)

actually, there are still two problems to solve, and i would like know any opinion on how to address these.

a) although read / writes to the FRAM are working fine, FREE PORT does not. instead, FREE PORT is getting executed without error message, but the memory is still fully accessible and doesn't show up as freed memory during a SHOW PORT command.

b) copying the rom area into $30000, and afterwards swapping rom and ram area works...for ver 1BBBB, that is. any attempt to swap a ver 1CDCC into the rom area results in a crash after a power-on cycle. i suspect hardware incompatibilities with my 1BBBB machine and the 1CDCC rom data. can anybody shed some light on this? in fact i didn't use a "real" 1CDCC image for testing, but used the rom image from jeff's emu71.


thank you in advance for any hints!

cheers,

hans


#8

Quote:
b) copying the rom area into $30000, and afterwards swapping rom and ram area works...for ver 1BBBB, that is. any attempt to swap a ver 1CDCC into the rom area results in a crash after a power-on cycle. i suspect hardware incompatibilities with my 1BBBB machine and the 1CDCC rom data. can anybody shed some light on this? in fact i didn't use a "real" 1CDCC image for testing, but used the rom image from jeff's emu71.


thank you in advance for any hints!


First one remark to the different CPU models. Early HP71B use a 1LF2 CPU, the later models a 1LK7 CPU from the 18C/28C calculators. The only difference between these two CPU revisions are the additional opcodes PC=(A) and RSI in the 1LK7 revision.

Whether the 1AAAA, 1BBBB, 2CCCC or the 2CDCC ROM revision make use of these additional two opcodes.

The internal 16KB main RAM made with 16 1LG8 RAM chips (2K nibble). Four of them are always connected to a 4KB hybrid chip.

So lets have a look on the memory configuration after startup:

Hard configured:

ROM (64K)
$00000-$07FFF
$08000-$0FFFF
$10000-$17FFF
$18000-$1FFFF

Display Driver 1
I/O: $2E100-$2E1FF
RAM: $2F400-$2F7FF

Display Driver 2
I/O: $2E200-$2E2FF
RAM: $2F800-$2FBFF

Display Driver 3
I/O: $2E300-$2E3FF
RAM: $2FC00-$2FFFF

Soft configured:

Port0:
RAM (4K)
$30000-$307FF
$30800-$30FFF
$31000-$317FF
$31800-$31FFF

RAM (4K)
$32000-$327FF
$32800-$32FFF
$33000-$337FF
$33800-$33FFF

RAM (4K)
$34000-$347FF
$34800-$34FFF
$35000-$357FF
$35800-$35FFF

RAM (4K)
$36000-$367FF
$36800-$36FFF
$37000-$377FF
$37800-$37FFF

In the 2nd step let us add a HPIL module. The HPIL module is connected to the internal port0.

HPIL I/0
$20000-$2000F

ROM (16K)
$40000-47FFF

In the 3rd step let us add a MATHROM module in port slot4. The MATHROM module has 32KB made with two 1LG7 (32K nibble) chips. The address layout then

ROM (32K)
$48000-$4FFFF
$50000-$57FFF

In the 4th step let us add a 4KB module in port slot1. The RAM content is merged to the main RAM. The address layout then

RAM (4K)
$38000-$387FF
$38800-$38FFF
$39000-$397FF
$39800-$39FFF

This is directly behind the internal RAM.

Now let us free the port1 RAM to independent RAM with:

FREE PORT(1)

Now the RAM mapping in port1 moved from

RAM (4K)
$38000-$387FF
$38800-$38FFF
$39000-$397FF
$39800-$39FFF

to

RAM (4K)
$58000-$587FF
$58800-$58FFF
$59000-$597FF
$59800-$59FFF

That's directly behind the MATHROM.

Back to your entire question. As you see the address area beginning at $30000 is occupied by the internal RAM and not free. On "Emu71/DOS" the internal single 32KB main RAM is mapped at:

RAM (32K)
$30000-$3FFFF

The soft configuration mapping strategy seem to be (from lower to higher addresses):

  1. I/O MEM
  2. Main RAM MEM
  3. ROM MEM
  4. Independent RAM

In consequence this means after a FREE or CLAIM port or adding or removing a module the complete memory mapping can reordered by the HP71B OS.

Cheers

Christoph


#9

Quote:
"Emu71/DOS"
<VBG>

Anybody got the joke?

Happy Easter.....Mike

#10

christoph,

thank you for the info. (btw., i received youremail).

i totally agree with you concerning the memory handling that you are explaining in your post. i know that the HP-71B itself cares for the address handling of the plugins. to be more precise: for testing, i configured the FRAM extender as 2 x 32kByte RAM. therefore, the HP-71B reordered internal ram and plugin-ram in descending size order, meaning that the two 32kB RAMs became located from $30000 to $4FFFF, while the internal RAM got located at $50000 to $57FFF.

that's why memory swap between ROM address space $00000-$1FFFF and RAM address space $30000-$4FFFF will be working o.k., as long as the neccessary 64kB of plugin-RAM is configured as an assortment of modules that are all bigger than 4kB modules. otherwise...amnesia. (hm... should have mentioned that ;o)
but that's not my headache. the problem is, that i don't have fully discovered yet how the FREE PORT command works, and whether it uses hardware commands that my extender does not properly decode yet.

at the moment,the commands as layed out in chapter 2.1.2 of the hardware IDS are all implemented with the exception of POLL and BUSCC, and the ominous command "B", which is described as being "reserved".

hans


#11

Quote:
i totally agree with you concerning the memory handling that you are explaining in your post. i know that the HP-71B itself cares for the address handling of the plugins. to be more precise: for testing, i configured the FRAM extender as 2 x 32kByte RAM. therefore, the HP-71B reordered internal ram and plugin-ram in descending size order, meaning that the two 32kB RAMs became located from $30000 to $4FFFF, while the internal RAM got located at $50000 to $57FFF.


Sorry, you're right. Larger RAM modules than the internal 4K are configured first. I missed that, so the addresses above are correct.

Quote:
but that's not my headache. the problem is, that i don't have fully discovered yet how the FREE PORT command works, and whether it uses hardware commands that my extender does not properly decode yet.


I added a hybrid 64KB (2*32KB) RAM in port 1 to a standard HP71B.

The C=ID codes for the two 32KB modules are: $00009 and $80009.

So the address layout for port 1 is

$30000-$3FFFF
$40000-$4FFFF

The address layout of the internal RAM for port 0 is

$50000-$507FF
$50800-$50FFF
$51000-$517FF
$51800-$51FFF

$52000-$527FF
$52800-$52FFF
$53000-$537FF
$53800-$53FFF

$54000-$547FF
$54800-$54FFF
$55000-$557FF
$55800-$55FFF

$56000-$567FF
$56800-$56FFF
$57000-$577FF
$57800-$57FFF

When you now call FREE PORT(1), first the independent RAM marker $B3DDDDDE is written to address $30000 (start of the port 1 memory) and the rest of the port 1 memory is set to 0.

Then the RESET command is called.

Now all soft configurated modules are getting a CONFIG command. Every first chip of a hybrid RAM is configured at address $80000, all other chips at $40000. I think, but not checked, the HP71B OS is trying to detect the independent RAM marker $B3DDDDDE.

When all modules have been configured, the RESET command is called a 2nd time.

But now we have differences between HP71B ROM rev. 1BBBB and 2CDCC.

In the new module configuration process with the CONFIG command, all modules are placed at their final memory address.

Port 0 with the internal RAM:

$30000-$307FF
$30800-$30FFF
$31000-$317FF
$31800-$31FFF

$32000-$327FF
$32800-$32FFF
$33000-$337FF
$33800-$33FFF

$34000-$347FF
$34800-$34FFF
$35000-$357FF
$35800-$35FFF

$36000-$367FF
$36800-$36FFF
$37000-$377FF
$37800-$37FFF

Port 1 with the 64KB independent RAM @ ROM rev 2CDCC:

$D0000-$DFFFF
$E0000-$EFFFF

Port 1 with the 64KB independent RAM @ ROM rev 1BBBB:

$E0000-$FFFFF
Unconfigured Size = $10000

The 2nd RAM with ID = $80009 is unconfigured because the HP71B OS is doing an UNCFG with C[A] = $FFF00. This is a known bug of ROM rev 1BBBB mentioned in the Soft Forth Manual p.2-2.

Everything works fine on a 1BBBB ROM when you have two 32KB modules both returning the ID's $80009 or with a 96KB hybrid module (32KB + 64KB) returnig the ID's $80009, $00009, $80009.

Quote:
at the moment,the commands as layed out in chapter 2.1.2 of the hardware IDS are all implemented with the exception of POLL and BUSCC, and the ominous command "B", which is described as being "reserved".

I don't think that a RAM or ROM module answer to a POLL command. I assume the timers inside the 1LF3 chips and for example the HPIL mailbox will answer for a POLL command in the case of a service request.

From the functional Saturn emulation aspect the bus commands described in chapter 2.1.2 of the hardware IDS are not emulated in Emu48 based emulators, so I can't say to much about this.

Christoph


#12

christoph,

thanks for your information. that is exactly what i was looking for. indeed, i could track down the problem now to the point where the "magic word" for the the independent ram ist written before the block erase happens, but isn't read back properly properly afterwards.



thanks again for your input, i'll keep you posted here on the proceedings!

best regards,

hans


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