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HP-15C LE: why emulate?



#8

I have a naive question: I thought contracting the manufacture of custom chips for embedded applications was standard practice. What would it take (or rather what would it have taken) for HP to send the original chip design out to be shrunk and manufactured using a modern process?

Second question: Has anyone successfully run a program or calculated an integral that takes, say 10-20 minutes or longer, on the new HP-15C LE?


#9

I ran my pi calculation on a 15C LE for 16+ minutes. Why do you ask, battery life questions?


#10

Quote:
I ran my pi calculation on a 15C LE for 16+ minutes. Why do you ask, battery life questions?


Mostly battery life, and the brown out issue mentioned earlier which I came across on my LE unit. I would rather have only a mild speedup (say 5x) and much longer battery life.


#11

I like the mild speedup and long battery life idea, but better still would be some way to control the speed via the self-test menu. You can do this to a very limited extent on the 20b/30b by setting Test System On/Off. It would be easy to add a more comprehensive option for this to the 12C+/15C LE firmware once the proper way of doing real-time pauses is worked out.

#12

Katie,

I presume that the full 21 mA current draw during program execution (which you reported here) was being extracted from the CR2032 batteries during the entire 16+ minute pi calculation program, correct? With all the talk about the weakness of the 2032 batteries, I find that quite surprising. Are you at all surprised that the batteries survived for the whole program and did not brown out, thereby wiping the program and all calculated pi digits? Would you be able to monitor battery voltage while running that program to see how it drops during such an extended period of high demand?

best regards,

Jeff


#13

The 34S can monitor its voltage (BATT). On the 15C (LE) there is no such function if I'm not mistaken.


#14

Marcus,

I meant monitor using some sort of test set up. Katie seems to have lots of cool test equipment.


#15

I'm away from my test equipment for a few weeks, but sure I could log the voltage and generate a graph. However, I'm not at all surprised that the CR2032 cells can supply 21ma for 16+ minutes. They are being damaged certainly but not exhausted. Also there are two of them so if they have the same internal resistance they're each suppling only 10.5ma.


#16

Quote:
However, I'm not at all surprised that the CR2032 cells can supply 21ma for 16+ minutes

Well, that is "only" about 2.8 mAh extracted from each battery, and their nominal capacity is something like 250 mAh, so I guess it should not have been that surprising. I did not do any calculations, I just recalled the discussion about the inadequacy of the CR2032 cells. According to this paper, the capacity goes down the harder you work the battery. The authors of that paper seemed most concerned with pulse loads, testing up to 80 mA. The highest continuous load for which they give the resultant capacity (to 2.0 FEP voltage) shows about 155 mAh. Capacity seems to drop rapidly with higher continuous load, so probably less than 100 mAh at 10.5 mA continuous. Even if it is only 50 mAh that would allow you to run a program continuously for nearly 5 hours. Does that sound remotely possible, or did I miss a factor of 10 (or 1000, more likely) somewhere in this analysis?


#17

I think that you're in the right ball park on this. There's a lot of variation among battery manufacturers on these CR2032 cells, 50mAh is likely be a realistic estimate for some of them at a current draw of 10.5 continuously. I should do some actual testing....

#18

About $1M. Assuming that they actually still have the full engineering documentation on the original design, which they probably don't. And then a few years later the fab line would be shut down, and they'd have to do it again.

It is *far* more sensible to migrate to a standard architecture. When the Atmel part they use today eventually goes away, it won't be too difficult or expensive for them to switch to another ARM-based microcontroller. (Or even MIPS or something else.)

Edited: 10 Jan 2012, 4:20 a.m.


#19

Quote:
Assuming that they actually still have the full engineering documentation on the original design, which they probably don't."

That was my first thought upon reading this question. But HP
has been evolving the hardware design throughout its lifetime
for benefit of the 12C. So it probably wouldn't be as extreme
a prospect as capturing a 1980 semiconductor design into
contemporary tooling.

Quote:
"And then a few years later the fab line would be shut down, and they'd have to do it again."

I'd hazard the HP calculator division has no desire (nor budget)
to be in the custom semiconductor business given the sales volumes
and maturity of these products.

I'm still a little mystified of the rationale specifically for
the encore voyager sam7 design in at the time. As a platform
for the 12c it was/is complete overkill from a performance and
component cost perspective. And HP has history of subcontracting
out designs based upon economy architectures elsewhere. Perhaps
it was more of a ongoing development/maintenance concern which
tipped the scales to the sam7. Or the encore 15c was somewhere
on the roadmap and the excess capability was believed a
required contingency for that future product.


#20

They wanted to choose a microcontroller that would be suitable for a wide range of calculator products, not just a 12C or 15C.

#21

This is not a naive question at all. It's one of engineering economics. When the original HP 12C and 15C chips were designed, chips were developed using polygons--drawn rectangles. The design spec may have started with "I need four 56-bit registers for the stack" but would have quickly been converted into drawn rectangles on multiple mask layers, by hand. Today, the design would be specified in a Hardware Description Language (HDL), likely Verilog, and then automatically converted into a netlist of connections and logic elements by an automated synthesis tool. HDL descriptions are comparatively easier to migrate from one process technology to another. Polygon designs require a lot of work, hand work, to retarget.

On the other hand, HP elected to use a standard, inexpensive, and most important, an already designed microprocessor to implement the new 12C and 15C LE. The software emulation layer essentially existed already. So the project to revive the calculators was a relatively low-risk one with a potential payoff. Designing a custom IC would have greatly increased the risk and the cost, reducing the potential payoff and possibly creating a losing proposition for HP.


#22

Perhaps it could be a candidate for something like this:
http://www.visual6502.org/welcome.html. You have to admire the devotion of some folks!

#23

Quote:
This is not a naive question at all. It's one of engineering economics. When the original HP 12C and 15C chips were designed, chips were developed using polygons--drawn rectangles. The design spec may have started with "I need four 56-bit registers for the stack" but would have quickly been converted into drawn rectangles on multiple mask layers, by hand.

I'm at least a little foggy on that detail. But I believe I
recall CAD for mask creation to have been in use by that
point in time.

Quote:
Today, the design would be specified in a Hardware Description Language (HDL), likely Verilog..

It has already been accomplished as a comprehensive
effort for the NUT CPU. The result of which includes this design specification, a substantial and significant
engineering achievement in its own right.

[edit: grammar]

Edited: 11 Jan 2012, 6:25 p.m. after one or more responses were posted


#24

Yes, CAD was in use at that time. What that meant was that people didn't need to hand draw the polygons. They could drag a rectangle into place. More advanced: you could drag the symbol of a transistor onto a schematic and that would cause the rectangles to be generated. HDLs and synthesis tools did not come into wide use until very late in the 1980s and did not exist at all when the 12C/15C processor were developed.

The HP 12C was introduced in 1981. That means the processor chip was designed in 1980 or 1979. That's before the IBM PC was introduced. So bringing that design into the 21st century is akin to trying to bring one of my WordStar for CP/M files from one of my NorthStar Horizon's 10-hole, hard sector floppy disks into one of today's systems. First, there's the format conversion from WordStar's file format. Then there's the problem of reading a 10-hole, hard-sector, 5.25-inch floppy disk. Seen a new computer with any sort of floppy disk lately, let alone a 5.25-inch floppy?

That's assuming the oxide hasn't fallen off the disk already.

Now the design files for the original 12C/15C processor aren't likely to be on floppy disks. They're more likely to be on 9-track magnetic tape in GDS format. Those would be the files for mask making. The other design docs may or may not be even findable. In fact, the GDS files might not be findable after 30 years either.

FInally, the documentation of the reverse-engineered NEWT processor is truly impressive and I do not mean to say anything against it. But (A) it's not a chip design and (B) it doesn't belong to HP. Thus there is effort and risk needed to transform it into a chip. The HP 41CL project proves this can be done, with effort (and a lot of love).

Edited: 11 Jan 2012, 10:27 a.m.


#25

Quote:
The HP 12C was introduced in 1981. That means the processor chip was designed in 1980 or 1979.

There were several redesigns of voyager silicon, the last
of which appears to have occurred somewhere around the start
of the current millennium. My point (see #13 above) was
speculation of the design being captured in more recent
tooling than 30 y/o DG/Calma.

Quote:
But (A) it's not a chip design and (B) it doesn't belong to HP.

I wasn't suggesting HP should have designed yet another native
NUT platform. Rather pointing out a successful design effort
of the same in spite of being challenged to recreate a coherent
reference specification in advance of its unique functional
enhancements.


#26

Quote:
There were several redesigns of voyager silicon, the last of which appears to have occurred somewhere around the start of the current millennium.

HP's IC operations went to Agilent in the split in 1999. Presumably Agilent was under contract to continue producing ICs for HP for some period of time. Agilent sold that operation off as part of Avago in 2005. Avago sold that (describing it as a "printer ASIC" business) to Marvell in 2006.

Although the IP probably belongs to HP, in the various reshufflings of HP's calculator business, from Singapore to Australia then back to the US, all of the engineering records were discarded. If HP had wanted to design new silicon for the 12C, they would have had to start from scratch.

While the cost of designing the IC might not have been too unreasonable, the cost of putting it into production would have been a deal-killer. Mask charges for ASICs in current CMOS processes tend to be $1M and up. The older processes had much lower mask charges, but those processes are all either already obsoleted, or on their way out.


#27

Quote:
Although the IP probably belongs to HP, in the various reshufflings of HP's calculator business, from Singapore to Australia then back to the US, all of the engineering records were discarded.

I wasn't aware this IP was caught up in the above shuffle.
The loss though does seem ironic if not somewhat depressing.

Although I suppose in one interpretation it gives added legitimacy
to those motivated to recreate this legacy technology, effectively
being an effort of preservation vs. simply a copy of closed IP.


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