HP 35s - No Firmware Update?
#1

I purchased a 35s this week and was shocked to find this five year old design is still on its original firmware. So I went looking for the means to flash the thing.

The CPU, or microcontroller if you will, is an SPLB31A with 256K of ROM according to the Sunplus data sheet. There is no mention of how the software is loaded.

Is it in fact the case that ROM in the SPLB31A means masked ROM? Thus updating the firmware requires creating new photo masks for the chip lithography?

Thanks.

#2

Yes, it uses masked rom. There is no possibility to reprogram the device.


- Pauli

#3

Quote:
I purchased a 35s this week and was shocked to find this five year old design is still on its original firmware. So I went looking for the means to flash the thing.

HP-35S was introduced in 2007. TI-85 was introduced in 1993 and went through 10 versions before being discontinued 4 years later. I hope I don't shock you further. :P

#4

I wish it were possible to repurpose the 35s. Decent screen, good keyboard, lots of RAM, traditional looks. No exposed I/O but that is livable.


- Pauli

#5

Somehow it reminds me the initial CD claims - "perfect sound forever" - although here it won't be "perfect" but "you're stuck with this forever."

#6

Quote:
I wish it were possible to repurpose the 35s.


Maybe we can't. But HP could!
#7

I wish the same for the 17bII+ Silver:

Much better anti-glare screen, better keyboard, anti-glare front, lots of RAM, even better form factor than 35s.

But unfortunately they made the same mistake with the 17bII+S as with the 35s: No plans for updates:-(

And yes, I know that it uses a different microcontroller, but hey, in contrast to the poor arm socs in the other recent lower end hp's that thing can at least drive a real 132x16 pixels dot matrix;-)

And from my experience the batts in the 17bII+S last much longer than in the 35s...

Ray


Edited: 18 Apr 2012, 3:01 p.m.

#8

Quote:
I wish it were possible to repurpose the 35s. Decent screen, good keyboard, lots of RAM, traditional looks. No exposed I/O but that is livable.

FWIW that's a 4Mhz 8-bit architecture with 16-bit features
forcibly hammered in sideways, the ability to peer
at the 256MB ROM is restricted to 2x 16KB windows, and the bulk
of the RWM dangles at the end of an anaemic 400KHz i2c bit-serial interconnect. The hardware managed stack is physically wired
and a maximum of 256 bytes.

For all of the bad press the sam7 suffers here, I don't see
the Sunplus hodgepodge being preferable to a 32-bit linear
address space ARM core capable of 36Mhz operation under
similar conditions. While even power consumption relative to
clock frequency appears to be a wash, the sam7 achieves
higher processing throughput. I suppose the SPLB31A must have
been chosen by someone in purchasing rather than engineering.

I can appreciate the benefit of a prospective wp34s port to
such a device in terms of generalizing the codebase w/r/t
a worst case target architecture challenge. But my personal
experience dealing with the contortions KEMU needed to navigate
relative to the substantially less radical AVR core, porting
to the Sunplus wouldn't be my idea of a fun project.

Concerning the 35s I've found its display to be quite
uninspired, essentially being an inflexible character
cell configuration with the concession of fully RWM-mapped
pixels. The hp-42s did far better than that some 20 years
earlier.

#9

Quote:

Concerning the 35s I've found its display to be quite
uninspired, essentially being an inflexible character
cell configuration with the concession of fully RWM-mapped
pixels. The hp-42s did far better than that some 20 years
earlier.


The HP-35s is really disappointing, especially the display (beside the catastrophic software). First notably from the typographic point of view the digits / characters have ill-favored proportions, they are much too high and have the wrong spacing, and---besides the reflective screen---the resolution is to low for a good readability, in particular of greek characters. Squarish 'pixels' should solve the first problem---and they free up space for a third display line.

BTW there's a very nice technique for pure character-based displays, much better than 7x5 dot matrix elements (have a look at the brochure):

http://www.aegmis.de/PRODUKTE/GEAVISIONELEMENTS/SEGMENT/tabid/587/language/en-US/Default.aspx

In comparision to my every-day work-horse HP-15C from 1985---I give this masterpiece of 'engineering art' five stars in every category---the HP-35s gets four stars for the keyboard (five for the ENTER key!) and the color scheme [1], three stars for the general design of the casing (good: the rubber feets), at most two stars for its display and casing quality, and less than one for the (current) firmware and the processing speed (compared e.g. with the HP-15C LE).

Martin

[1] I give only three stars for the label font---the "Futura" is caused by HP's (IMHO) not very elegant corporate design. And it's very thoughtless or dilettantish for example to write the units "kg / lb" and "cm / in" correctly in lower-case letters but "KM / MILE" in capitals!


Edited: 19 Apr 2012, 5:55 a.m.

#10

If the e-ink technology has a too low refresh rate for full-graphic displays and is too expensive (for at least something around 360x240 pixels e.g. in the HP-50g successor ;-) apply these limitations for the relatively simple write cursor on scientific or financial calculators with, lets say, 192x32 pixels for two display lines? (My colleague's Kindle e-book reader has no display problems while moving a cursor...)

Come on, HP! Remember your "leap" with the alpha-numeric LCD of the HP-41C and be a bit innovative! :-)

Edited: 19 Apr 2012, 12:00 p.m.

#11

Quote:
..the bulk
of the RWM dangles at the end of an anaemic 400KHz i2c bit-serial interconnect.

That's probably incorrect -- I'd assumed i2c since the
SoC provides an i2c host interface. However 32KB SRAM really
isn't available in an i2c interface. So it may be SPI via
a bit-banged interface, which assuming a 4MHz cpu clock and
historic 65xx instruction timing would ironically result in a
burst transfer rate marginally under 400KHz.



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