Virtual memory architectures are based on swapping "external memory" into actual address space.
(I am not an expert on this so don't kill the amateur - a building engineer ...)Owning just a HP41 and a HP71B, both with IL it seems not so easy but ...
Considering synthetic programming: Bringing the instruction pointer in the alpha registers
(M,N,O,P) and executing an INA on the HP41 and OUTPUT :LOOP;X$ on the HP71 where X$ holds the
program for the HP41 would modify the HP41 program on the fly.I wrote a few small programs (not optimized, just to see if it is possible) and yes it works,
but only in SST mode on the HP41. In RUN mode it simply won't work.. any hint from the
synthetic specialists?Here some experimental listings, goal of the miniproject: "Hello World" AVIEW.
Big leap target ... a WALL function ??HP41 Listing:
01LBL "V" Just the label
02 STOPIO seems to clear all IO (IFC HP-IL msg)
03 1 Assumung the HP-71 is #1 (Could also be
anything else sending bytes
04 SELECT
05 SF 25 See HP71B listing ...
06 XEQ 01 To bring the program from Alpha regs back via return
07 RTN or STOP, GOTO 'END' or anything else
08 GTO 02
09LBL 01
10 RCL b
11 "` " 96 7 0 0 0 0 0 Instruction pointer => Byte 6 of reg 7 (M)
12 X<> [ X<>M
13 "AAAAA" append just 5 'A' (or anything else)
14 STO [ STO M
15 "AA" append just 2 'A' (or anything else)
16 RCL \ RCL N
17 " |" 167 29 145 124
The instruction code for REG M ... see below
167 29 => XROM 28,29 -> HP41-IL INA function
145 124 => STO b
19 STOP For convenience SST usage (see below)
18 STO b and jump into M (see line 12, falls through '0' bytes'
19 ENDThe HP71B program:
10 CONTROL OFF
20 M$=CHR$(167)&CHR$(29)&CHR$(173)&CHR$(25)&CHR$(133)&CHR$(178)&CHR$(130)
40 O$=CHR$(240+11)&"HELLO "
50 N$=CHR$(206)&CHR$(119)&CHR$(113)&CHR$(0)&CHR$(0)&CHR$(0)&CHR$(0)
60 C$=O$&N$&M$
70 OUTPUT :LOOP ;C$
140 O$="WORLD"&CHR$(126)&CHR$(133)
150 N$=CHR$(206)&CHR$(119)&CHR$(206)&CHR$(113)&CHR$(0)&CHR$(178)&CHR$(4)
160 C$=O$&N$&M$
170 OUTPUT :LOOP ;C$Comments per line:
10 Just to cooperate with the HP41
20 M$ (REG M) holds code equivalent to HP41:
INA 167 29
FC? 25 173 25
RTN 133
GTO 01 178 130 => a COMPILED GTO thus a jump to start of register N (needs
no label, restriction: do not PACK or anything else that destroys
the jump bytes
40 O$ (REG O) holds code equivalent to HP41:
"Hello " 251 + "HELLO" xFB (length 11) as first part of the string
50 N$ (REG N) holds code equivalent to HP41:
X<>O 206 119 And bring O (The "Hello ") to
X<>Y the Y Register
+ 4 NOPS ('0' Bytes) => The Instruction pointer falls to M ...
60 Add the whole bunch for sending
65 Just to follow the 71
70 Send to the 41
140 O$ :
"WORLD" The rest of the "Hello " String (NO APPEND !)
AVIEW 126 Display it
RTN 133 and a normal return (To HP41 V Program line 8)
150 N$ :
X<>O 206 119
X<>Z 206 113 Put 'WORLD' in 'Z'
NOP 0 => to make the compiled goto (next line) easier ...
GTO 01 178 4 => a COMPILED Jump to REG Y, Byte 6 (Left Byte)
165
170 And send it to the HP41What happens ... In abstract
In 'V' the bootstrap instructions are loaded for the initial INA function in Line 18
This could be improved with M$ code as in HP71 but I was to lazy ..In Detail:
<IP> means instruction pointer, located at the byte to start with
Void fields means a '0'(Zero) Byte (<IP> falls through these as NOP)<IP> falls through ... <IP>
|Byte| 6 | 5 | 4 | 3 | 2 | 1 | 0 |
---------------------------------------------------------------------
| M | | | | INA | STO b |
---------------------------------------------------------------------
The first INA results in:|Byte| 6 | 5 | 4 | 3 | 2 | 1 | 0 |
---------------------------------------------------------------------
| O |251 (FB)| 'H" | 'E' | 'L' | 'L' | 'O' | ' ' |
------------------------------------------------------------------------------------------------------------------------------------------
| N | X<>O | X<>Y | | | | |
---------------------------------------------------------------------
<IP>
---------------------------------------------------------------------
| M | INA | FC? 25 | RTN | GTO 01 (R:N,B6)|
---------------------------------------------------------------------So a jump to N follows to the cuntional code, putting FB+Hello in Y and falls
in M with the next INA resulting in ...|Byte| 6 | 5 | 4 | 3 | 2 | 1 | 0 |
---------------------------------------------------------------------
| O | 'W" | 'O' | 'R' | 'L' | 'D' | AVIEW | RTN |
------------------------------------------------------------------------------------------------------------------------------------------
| N | X<>O | X<>Z | |GTO 01 (R:Y,B:6) |
---------------------------------------------------------------------
<IP>
---------------------------------------------------------------------
| M | INA | FC? 25 | RTN | GTO 01 (R:N,B6)|
---------------------------------------------------------------------
So assuming INA works fine, code jumps to N and then to Y:Byte 6 where it finds<IP>
|Byte| 6 | 5 | 4 | 3 | 2 | 1 | 0 |
---------------------------------------------------------------------
| Y |251 (FB)| 'H" | 'E' | 'L' | 'L' | 'O' | ' ' |
---------------------------------------------------------------------
| Z | 'W" | 'O' | 'R' | 'L' | 'D' | AVIEW | RTN |
---------------------------------------------------------------------Loading "Hello World" in the ALPHA regs (therefore this code is in Y,Z), doing an AVIEW and
return to "V" line 08 (subsequent the XEQ 01 => We preserved the return value in REG b).Start as follows:
Run the HP71 Program (Output statements are buffered)
Run the HP41 Program, perform the extra R/S to continue after the STOP in 18 => Rubbish in DisplayAND NOW ... This works when in SST mode on the HP41 (SST from line 18 onwards or from line 1 ...)
=> A nice "HELLO WORLD" is Aviewed ...
Step until you encounter RTN to return to the "V" program!!
Otherwise your program pointer remains in the status register.Its a pain in the brain but I can't find the bug... Somebody has an idea??
It could open therabytes of virtual memory for the HP41 of this worksSomething like this as boot-trap loading some bigger program doing bigger things doing ....
When it workes, Yes Yes I will, I'll make it an article ....
Best regardsRaymund
HP41 Virtual Memory - Terabytes?
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03-13-2009, 09:56 PM
03-13-2009, 10:37 PM
This is wicked cool...
But the HP71 can't handle terabytes, so it would have to be talking to a PC using a HP 82973A. But a PC with an ISA slot probably can't handle terabytes either, so it in turn would have to be using a decent 64-bit server (running Linux, for speed) in order to manage the multi-gigabyte chess program someone will undoubtedly write once this capability is available.
03-13-2009, 11:00 PM
I got the same results with a HP82164A (RS232) with my humble PC
03-13-2009, 11:37 PM
Quote:Raymund, I don't know anything about synthetic programming or details of the HP 41, but I know something about computer architectures. Modifying code is often tricky because the computer assumes just the opposite - that it won't be modified. This lets it do things like keep recently used instructions in cache, or soon-to-be-executed instructions in an internal pipeline. The upshot is that if you modify the instruction stream, you have to flush the cache and the pipeline. I don't know if the HP41 has either of these things, but your symptom is pretty classic for the problem. Good luck, and do keep up posted.
03-14-2009, 04:49 PM
Maybe the MCode programmers can give a statement to this?
03-15-2009, 05:09 PM
Raymond, Fabulous idea! No specialist here, but just a couple thoughts (don't have any HP with me currently but will try your set-up at home and share any further thoughts if I have any)
Again, fascinating idea, do let us know how it goes! Cheers Peter
03-15-2009, 09:49 PM
Hi Peter
03-16-2009, 10:16 PM
Raymond,
Thanks for the feedback. Seems that F17 did not help but based on your suspicion that the second INA does not receive all I feel more certain that one of two things are happening.
However, if a WALL with a loader-program is your desire, I'm not sure that this way is the easiest possible to achieve this (aside from the pure intellectual pleasure to have programs run in Alpha. In the heydays(?) of the 41, Valentin Albillo developped a whole series of articles which where based on obfuscating programs by running it in Alpha only. The program basically was a series of synthetic alpha strings with a STO b to start the whole program...)
What about the following pseudo HP-41 program to receive the data from the 71: Lbl 'GetPGM' This is a basic principle that was used for various tricks IIRC.
One thought though: I'm not sure how INA works with non-display characters and if it can be always trusted. Also, I'm not sure if it does not add a '01' in front of each register M/N/O for each set of 6 strings. This would have to be tested. INA (read in 14 characters representing 7 bytes in hex) It would be twice as slow but would definitely work. Still hope you can figure out what is going on with INA etc, its simply a very cool idea even though I think there might be better ways to achieve what you are aiming for. HTH Cheers Peter
Edited: 16 Mar 2009, 10:19 p.m.
03-17-2009, 10:54 PM
Hi Peter & all |
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