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MLDL 2000 question - Miki Mihajlovic - 12-01-2005

Can anyone of you new proud owners of MLDL 2000 tell me about some of the results of test that Meindert suggests on page 11 of User Manual.

Namely, steps (5),(6) say that after you cleared page $9 and moved M2K ROM from $8 to $9 you should see two times -M2K entry on CAT 2.

Step (7) says that disabling ROM in FLASH and enabling it in SRAM puts it in page $F and after executing XCAT 21 should show ROM entries as $Fxxx.

Can anybody confirm that this is the way you had it, since I was not able to see two entries of M2K at (6) and at (7) I still get ROM entries showing as $8xxx and not $Fxxx. Dip switches are of course in correct position as per manual.

Miki


Re: MLDL 2000 question - Matthias Wehrli - 12-01-2005

I do have a MLDL from Meindert but as he tested the unit allready I didnĀ“t. Maybe you should load a CCD ROM into you HP-41. WHith CAT8-F you can test, where the K2K Rom is.

Matthias


Re: MLDL 2000 question - Vieira, Luiz C. (Brazil) - 12-01-2005

Hi, Miki;

I'm one of the named 'happy owners' and I also did not succeed seing the espected results. Meindert mentions in his site (www.kuipers.to/hp41.htm , go to DOWNLOAD) that it may happen.

See, when you change both SW3 and SW4, you select one of the four possible Setting Rgister configuration (SR0, SR1, SR2 or SR3) available in the kind of memory you choose through SW2 (SRAM or FLASH). Each SR# allows any page in the HP41 bus (P#0 to P#F, four banks each), so each SR# stores the address of up to 64 memory positions inside MLDL2000. BUT if you choose FLASH Setting Register, it does not mean the SR 'per se' must point to a FLASH position, instead it can point to any valid FLASH or SRAM position.

Meindert pre-configures each MLDL2000 to leave with M2K ROM image in FLASH #0000 and the four FLASH SR configurations ready to follow the examples. So, when you place SW2 in OFF, you are dealing with THe setting registers in FLASH memory, so the configuration is kept for as long as it takes till you use it. If SW2, SW3 and SW4 are set to OFF, then MLDL2000 is instructed to use FLASH SR0 contents, which allow the HP41 to 'see' only the M2K ROM image recorded in FLASH memory through page 8 (lower port 1). As you choose SR1 (SW3=OFF, SW4=ON), SR2 (SW3=ON, SW4=OFF), the related configuration should activate one valid address in SRAM so -M2K ROM image can be copied, listed and used/erased. When you finally choose SR3 (SW3=SW4=ON), the HP41 'sees' only the copy of -M2K ROM, now in SRAM, through page #9 (upper port 1). Keep in mind that what the HP41 sees is not the SR#, instead what each SR# contents 'tell it to see'. e.g., by changing SR0 contents the HP41 may see whatever you load in whatever valid SRAM or FLASH address.

What seems to happen is that Meindert may have not programmed the FLASH SR with the suitable contents in some units, mine included. I'd suggest to go ahead with other experiments if you actually see

-M2K ROM

after CAT 2. It is most likely that your unit is perfectly fine. After loading your PC with the MLDL2000 manager and the necessary USB driver, things will get clearer, believe me.

Hope this helps.

Cheers.

Luiz (Brazil)


Edited: 1 Dec 2005, 4:07 p.m.


Re: MLDL 2000 question - Miki Mihajlovic - 12-01-2005

Hi Luiz,

Thanks for the detailed low-down. After some initial troubles with IO PCB that Meindert resolved for me I have put the unit together a few days ago and it looks really great. By the way, your pictures were a great help since I studied them closely for the housing cutouts - great job Luiz. My unit was working OK with mentioned 'problems' of M2K ROM showing in $8xxx but now it totally kills all of my calcs to the point of no return except reversing battery polarity for a few minutes. Interesting thing is that the software control from PC through USB works flawlessly, all the tests, copying, moving, editing, up-downloading goes fine, external battery keeps SRAM alive etc. but as soon as I move any of the switches from OFF that's it, calc winds up somewhere deep in the NUT OS code and it is bye, bye. I am kind of suspicious that I have some wires shorting inside the housing since it is pretty tight in there. I will dismantle it this weekend and see how it works.

Miki


Re: MLDL 2000 question - Meindert Kuipers - 12-02-2005

Miki,

Please verify current consumption of the unit when it crashes you machine. While debugging I have seen some problems that cause the HP41 to go into very high current consumption even after the MLDL2000 disconnected. This was caused by a completely wrong configuration of ROMs in the MLDL2000. Please doublecheck all connections and verify the Settings Registers and ROM contents if these point to something sensible.

Meindert


Re: MLDL 2000 question - Vieira, Luiz C. (Brazil) - 12-02-2005

Hi, Miki;

I faced something close to what you describe, but I was entirely responsible, in my case. You see, I did not get the very MLDL2000 operation way at that time, so I tried to use SRx in SRAM (SW2=ON)prior to configure the corresponding SR. Only after I set all SRAM SRx to their default state I could use any SR confioguration, either SRAM or FLASH. I knew that EPROM's have all of its bits back to '1' after being erased, and FLASH behaves the same, so the default FLASH contents matches the default SR (all bits = '1'), but SRAM default contents are random, so if you set any SRx in SRAM prior to program it, who knows where does it point the HP41 to... No wonder why mine was completely lost, poor thing.

Cheers.

Luiz (Brazil)


Edited: 2 Dec 2005, 6:17 a.m.


Re: MLDL 2000 question - Miki Mihajlovic - 12-02-2005

I have checked the SRs and in SRAM they are all $3FF. In FLASH I got $000 for Page 8, Bank 0, the rest of them are $3FF. Dip switches are all OFF. When I try to clear them all and upload SR configuration to FLASH I got SR did not verify at $FFF20.

Any ideas?

Edited: 2 Dec 2005, 3:54 p.m.


Re: MLDL 2000 question (edited for errors) - Vieira, Luiz C. (Brazil) - 12-02-2005

Hi, Miki;

one thing I learned after having to reset the entire FLASH memory contents twice (because of my own mistakes) is: whenever updating FLASH SR, i.e., from your computer to MLDL, always erase entire sector 34 contents to default (ROM/SR handler already has the erasing feature).

Now I test all SR in SRAM first (to be sure it works) prior to load SR FLASH. Meindert calls our attention to this fact when suggesting to use FLASH SR to permanent (or hardly changing) configurations, and SRAM SR to configurations that may need future changing.

My way now is to save each SR (from SR0 to SR3) in separate files. This way, I test all four SR configurations in SRAM, save each in separate files (e.g.: FL_SR0_xxx.sr, and SR_SR0_xxx.sr, where FL refers to flash, SR refers to SRAM and xxx is a particular reference; I choose sequencial counting) and then I go to Erase FLASH feature, erase entire FLASH sector #34 then I load each valid SR in FLASH. If I have to change at least one single configuration, I go to all steps again. Well, changing a single "1" to "0" is harmless, but after having to erase the entire FLASH contents after insisting on uploading a SR set priot to erase sector 34 made me be more carefull and actually do what must be done. Please note: all because of my own fault.

As all FLASH SR are in the range #FFF00 to #FFFFF, your verifying error matches. In time: have you tried [Reset Flash] already? It is intended to prepare FLASH to be recorder again. Why not?

Hope this helps.

Success!

Luiz (Brazil)


Edited: 2 Dec 2005, 6:28 p.m.