Based upon some testing, I believe that the I register does in fact have more than 64 bits. First, you need to set the complement mode to unsigned since it appears in 1 and 2 complement mode, if the high order bit is on, the sign is extended when the value is stored in I.

Using the following program steps:

LBL A
RCL I
PSE
ISZ
GTO A
R/S
LBL B
RCL I
PSE
DSZ
GTO B
R/S

Set the word size to 64. In the X enter FFFFFFFFFFFFFFF8, store X into I. Execute A (GSB A). You will see the values go to all F's, then 0, 1, 2, 3..., but the ISZ will not skip the GTO A, meaning the I is never 0 even though the 64bit wide X says it is. To prove it another way, with the "small" value still in X, do a GSB B. The values will decrement, 3, 2, 1, 0, FFFFFFFFFFFFFFFF, but the DSZ will not skip the GTO B.

Maybe something else is going on to cause this behavior, it's hard to tell. If only one of the 16C designers was around to ask, we would know for sure. Oh well!

Steve