It occurred to me that all this (justified) attention and praise to the 15C_LE is having some side effects - namely the other fantastic news - like the 41CL - are not being covered in just measure. So here's one sweet and short note for your enjoyment.

Reference to Gene's article on the 15C+ "crazy" program to demonstrate both the 15C capabilities and the LE superior execution speed (no PSE lines in there :)

http://www.hpmuseum.org/cgi-sys/cgiwrap/hpmuseum/archv020.cgi?read=195013#195013

I keyed in the following program on my CL, conveniently equipped with the SandMath and the Advantage (they're all included in the CL module library).

For comparison purposes, the code mimics Gene's for the 15C+, including the shortcomings listed at the end of his pdf.

Execution time is about 2.60 sec, or about 3x faster than the 15C+ (yes, I'm biased).

The result is (no surprisingly) identical. Use function VMANT to see the full mantissa.

I wonder how does the "production" LE compare to the pre-production 15C+. Probably just the same? My ordered LE is entangled in the
customs cobwebs - anybody cares to complete the chart?

01 LBL "15C+"

02 RAD

03 "A"

04 3.003

05 MATDIM

06 0

07 MSIJA

08 2

09 MSR+

10 -3

11 MSR+

12 5

13 MSR+

14 7

15 MSR+

16 -1

17 MSR+

18 0

19 MSR+

20 1

21 MSR+

22 -2

23 MSR+

24 4

25 MSR+

26 MDET

27 10

28 /

29 STO 00

30 LASTX

31 ENTER^

32 3

33 NPR  - From the SandMath Module

34 1

35 E^X

36 10^X

37 /

38 PI

39 R-P

40 RCL 00

41 "SX/X"

42 SCI 6

43 INTEG

44 END

My 15C LE is taking about 1.5 seconds to run Gene's program.

- Pauli

Compared to a 42s, how does a 41CL stand-up? Are the keys on the 41 superior? With all the modules included the feature set should be good?What about speed?

Daniel.

I believe it was a display blinking problem that was seen on the 15c+ while running the crazy test program that pointed out an issue with the display update routines.

That's the base cause of the 15c+ run times being slower than the production 15c LE times (again, I believe). However, the fix that sped up the run times appears to have contributed to the pause problems.

But, Angel...how long does a 15c equivalent of this HP 41 program take?

LBL A

"HI"

END

:-)

Gene, do you know whether a firmware fix to address the PSE problems and other issues will be released soon?

Edited: 27 Sept 2011, 8:21 a.m.

Quote:

---

But, Angel...how long does a 15c equivalent of this HP 41 program take?

---

Well, it'll take forever - I am no 15C expert but I struggle to know how you type "HI" in it?

On the other hand, it's easy enough to find out how long it takes on the CL if you use the Time_Module to do the time keeping :-)

But can you time it on the 15C_LE ???

Quote:

---

Compared to a 42s, how does a 41CL stand-up? Are the keys on the 41 superior?

---

As always, it's a matter of personal taste. To me the keys are definitely superior, and no soft-Alpha thank God.

Quote:

---

With all the modules included the feature set should be good?

---

It's as close to perfect as you can imagine.

Quote:

---

What about speed?

---

As fast as I need it to be, a joy. See benchmarking article at:

http://www.hpmuseum.org/cgi-sys/cgiwrap/hpmuseum/articles.cgi?read=1002

(BTW it'll be good to have all that data in a chart format, right Gene??? :-)

In my experience the real-life calculations are a better measure, but FWIW here are the results:

The NEWT 41CL logic board upgrade for the HP 41. Code: LBL 00 + GTO 00

1X mode: 1,055

2X Turbo mode: 1,913

5X Turbo mode: 4,153

10X Turbo mode: 6,538

20X Turbo mode: 9,179

50X Turbo mode: 12,022

HP-42s FAST MODE S/N 2849A with goose disabled

Count: 6,485

HP-42S with "goose" disabled. Non-fast mode.

Count: 3,067

HP-42S

Count: 2,115 

Code: LBL 00 + GTO 00

Edited: added 42S data

Edited: 27 Sept 2011, 9:18 a.m.

alright, so after I looked at the 42S different "configurations" data points I went ahead and performed the test on a goose-disabled 41CL - comparing apples to apples, as it should be.

Code: CLA AVIEW 1 LBL_00 + GTO_00

The TURBO-50 figure increases to 27,417 - more than double!

Time for an updated chart!

I did another 41CL benchmark, and this article (sorry, in German).

1.5 or 2.6 sec makes not much difference to me, both is muuuch faster than the original calcs :-)

wow!, fantastic article - amazingly exhaustive and authoritative! Definitely the definitive reference - and I agree, we're in the realms of hair-splitting and fringe-wandering.

No word yet. I'm sure we will hear something soon.

The keys on the 41C set my personal standard for keyboard quality. They may or may not be the absolute best HP ever produced, but they are the ones my fingers got to know in my early days as a programmer. The 42S keys are quite good, but they just don't match my personal prejudice for "best."

Surely thats a big advantage if you have something complicated to implement.

Daniel.

Yes you can - just use any of the available editors from all the modules included in its library (HEPAX, DAVID-ASM, ZENROM...) and the Quasi-RAM blocks also available there.

Quote:

---

But, Angel...how long does a 15c equivalent of this HP 41 program take?

LBL A

"HI"

END

:-)

---

This is really quite easy.

LBL A

14

RTN

;-)

Ok, how about:

LBL A

"SMACK BRUCE"

RTN

? :-)

It states its standby (off) draw as 110 vs 10 of the original. So, its ten times worse, but then with a modern set of lithium AA's, that would probably compensate.

How does it compare to emulating on an ARM chip?

Is the battery usage a side effect of FPGA?

Daniel.

The FPGA is powered down during sleep. But the CPLD, which

contains the logic that must always remain active, draws over

half of that sleep current. The RAM only requires about 2uA.

The RS232 driver and 6V level shifter are about 5uA each, and

the various power supplies and reference divider take the rest.