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Assuming an HP-41 style architecture, what would be the minimum instruction set to implement matrix inversion.

I am not talking about number of steps, but instruction set SIZE, i.e. STO xx counts as one type of instruction, LASTx,
counts as another instruction, etc.



Hi, Vassilis;

forgive me if this is a dumb question, but I cannot help assumming that this is algorythim dependant. Am I right? If I am not wrong, either CCD or Advantage already have their matrix inversion as functions, but I am not sure if they share the same structure, so they may use a different set of instructions. Would that be a starting point? Or am I completely off-route?

Also, I read a few days ago (here) that the core of the Voyagers processor is too close to the one used in the HP41. Would the HP15C algorythim be a reference as well?

You see, I'd like very much to read more about this. Thanks for posting!


Luiz (Brazil)

You can write it entirely with a "subtract and branch if negative" instruction. The Nut CPU of the 41C doesn't have such an instruction, and memory has to be read and written with explicit instructions, so it takes a few more as a minimum:

     DADD=C   set memory address
C=REG read memory
REG=C write memory
ACEX exchange A, C
C=C-A subtract
GONC branch on no carry

In practice, if you restricted yourself to only those instructions, the code would be very large, and very slow.