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Full Version: bit manips on WP 34S
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First, I apologize for interjecting RPN into a Prime forum :-)

I'm porting some of my old 16C programs to the 34S. Most of it is going smoothly but I've hit a couple of speed bumps involving MASKR and RLn. While the 34S has these functions, they have the bit count hardcoded into the instructions while the 16C takes the count from X. This means that on the 34S the counts have to be known at the time the program is written while the 16C defers this until the program is run.

I can simulate the 16C's MASKR with "#002" ; "x<>y" ; "y^x" ; "DEC X" but is there a better way?

The only way I've come up with to simulate RLn is with a loop. Is there a better way?

While I'm at it, was making SDL/SDR work in integer mode ever considered? There are many times when multiplying/dividing by ten is useful.

And I suppose storage register logic is out of the question. Still, it be nice to be able to write something like "STO AND 02" or "RCL XOR 01".

Quote:
The only way I've come up with to simulate RLn is with a loop. Is there a better way?

I recommend indirect addressing. E.g. store n in R00 and enter RL -> 00 then.
Quote:
I can simulate the 16C's MASKR with "#002" ; "x<>y" ; "y^x" ; "DEC X" but is there a better way?

You can do the same on the 34S via indirect addressing:
```2
STO 00
```
I admit that's a bit complicated. I had long discussions with Pauli about those trailing parameters in the command design phase.

d:-)

Edited to correct a misunderstanding.

Edited: 5 Oct 2013, 9:42 a.m.

You can likewise put the count on the stack and use the stack register for indirect addressing such as in MASKR -> Y.

Thanx to both Walter and Marcus.

I guess I'm still learning how to read the manual. I just saw the "n" and thought the counts had to be hardcoded into the instruction. I didn't see the underline indicating indirect capability.

The arguments were added to the various bit manipulation commands because they were more powerful that way. We did consider 16C compatibility. We had all the 16C commands at one point then the argument versions were added and finally the now redundant 16C commands were removed. At the time, I came up with an alternative to support the 16C commands via library routines but it got lost somewhere along the way.

Using RLn as an example, define this function and save it to library flash space:

```        LBL'RLn'
x<-> Y
RL -> Y
x<-> Y
DROP
RTN
```

In your program, XEQ'RLn' and goodness will follow.

I intended DROPY instead of x<>y and DROP here but that command was removed. Subsequently, local registers were added so the fragment could also be:

```        LBL'RLn'
LocR 001
STO .00
DROP
RL -> .00
RTN
```

This is the same number of steps and uses more stack space although it extends more easily.

If you define all the required 16C functions that are missing similarly and save them into a library, porting your old programs will be a breeze. We should probably have included something like this in the 34S's standard library.

As for SDL and SDR, we never considered them for integer mode. In real mode, these commands are extremely fast -- they add their argument to the number's integer exponent and don't do any floating point arithmetic. In integer mode, they really should shift one digit as per the current base rather than being a multiply or divide by ten. Still, they could be added but it would consume valuable space.

Walter shot down storage register exponentiation. I suspect the same would have happened to storage register logical operations. At least we've got storage register minimum and maximum.

- Pauli

Quote:
Using RLn as an example, define this function and save it to library flash space:

```        LBL'RLn'
x<-> Y
RL -> Y
x<-> Y
DROP
RTN
```

In your program, XEQ'RLn' and goodness will follow.

You can also save a step with:

```        LBL'RLn'
x<-> Y
RL -> Y
<> XZTT
RTN
```

This doesn't work with a stack size of 8 :-)

- Pauli

Quote:
I can simulate the 16C's MASKR with "#002" ; "x<>y" ; "y^x" ; "DEC X" but is there a better way?

The 2x function is better here: 2x DEC X :-)

Last X isn't set correctly however.

- Pauli

Yes, I'm so used to the standard RPN 4-level stack that I always forget the 8-level option on the WP 34s.