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The HPGCC3 developers were kind enough to point out that I didn't compile with optimization (doh!). Furthermore, Claudio Lapilli provided two other versions that run even faster.

New results for publication:

       Structured C     Reg. vars   ARM Assembly

6Mhz 0.007060 0.006133 0.005235
75Mhz 0.000560 0.000484 0.000404
192Mhz 0.000213 0.000192 0.000150

Please also post the 6Mhz (very slow mode) numbers. I think it illustrates that you can get great performance and low battery usage with HPGCC3.


Reg Vars Source:

register int x, y, r, s, t, n, Ax;
int a[9];

for (n = 100000; n > 0; --n) {
r = 8;
s = 0;
x = 0;
Ax = 0;
do {
a[x] = Ax;
Ax = r;
do {
y = x;
while (y > 1) {
if (!(t = Ax - a[y]) || x - y == abs(t)) {
y = 0;
while (!--Ax) {
Ax = a[x];
} while (y != 1);
} while (x != r);
return s;

ARM Assembly Source:

#define _ASM asm volatile

int benchmark_asm() __attribute__ ((naked));
int benchmark_asm()
_ASM("STMDB SP!,{ R1-R8 }");
// 20 R=8
_ASM("MOV R3,#8"); // R3=R
// 30 REM DIM A(R) (DIM used if necessary)
_ASM("SUB SP,SP,R3,LSL #2");
_ASM("MOV R4,#102400"); // N= APPROX. 100000 ITERATIONS
_ASM("MOV R1,#0"); // R1=X
_ASM("MOV R2,#0"); // R2=Y
_ASM("MOV R0,#0"); // R0=S
_ASM("MOV R6,#0"); // A(X)
//40 IF X=R THEN 180 (140 for all solutions)
_ASM("CMP R1,R3");
_ASM("BEQ LINE180");
//50 X=X+1
_ASM("STR R6,[SP,R1,LSL #2]");
_ASM("ADD R1,R1,#1");
//60 A(X)=R
_ASM("MOV R6,R3");
//70 S=S+1
_ASM("ADD R0,R0,#1");
//80 Y=X
_ASM("MOV R2,R1");
//90 Y=Y-1
_ASM("SUBS R2,R2,#1");
//100 IF Y=0 THEN 40
//110 T=A(X)-A(Y)
_ASM("LDR R7,[SP,R2,LSL #2]");
_ASM("SUBS R7,R6,R7"); // R7=T
//120 IF T=0 THEN 140
_ASM("BEQ LINE140");
//130 IF X-Y<>ABS T THEN 90
_ASM("RSBMI R7,R7,#0"); // ABS(T)
_ASM("SUB R8,R1,R2"); // R8=X-Y
_ASM("CMP R7,R8");
//140 A(X)=A(X)-1
_ASM("SUBS R6,R6,#1");
//150 IF A(X)<>0 THEN 70 (<>0 omitted if possible)
// 160 X=X-1
_ASM("SUBS R1,R1,#1");
_ASM("LDR R6,[SP,R1,LSL #2]");
//170 IF X<>0 THEN 140 (<>0 omitted if possible)
_ASM("BNE LINE140");
_ASM("SUBS R4,R4,#1");
_ASM("ADD SP,SP,#8");
_ASM("ADD SP,SP,R3,LSL #2");
_ASM("LDMIA SP!,{R1-R8}");

Surely you're joking, Mr. Feldman!

Are those times in seconds? That's essentially instantaneous!


Seconds. To time, 100000 iterations were required.

Hello Egan,

Thank you for the results especially the very interesting ARM assembly version. Also thanks to Claudio for his effort to optimize the code.

I have also tested the FX-9860G with RegVars, but there is no difference at all. The compiler optimization seems to be good enough. I have used the unstructured version because it's slightly faster. But on the TI-89 the structured version is a bit faster. This is the reason for having two versions.

For sure Claudio's optimization is justified for more speed, but don't you think it's more accurate to use the original code to be comparable to the other calculators tested with C? So what do think about a compromise to not having too many versions of the same programming language. My suggestion would be using the original code with RegVars. Please let me know if you have a better idea.


So you'll post the RegVar and ASM 50g versions?

I have updated the benchmark as you have suggested including the "very slow mode" results.

Thank you for your numerous contributions. ;-)

Surely you're joking, Mr. Feldman!

Maybe you were writing in jest, but don't you mean "Feynman"--that great and well-rounded physicist, Richard P. Feynman. I love that book, by the way.


Oops. It was early, but yes, that's who I was meaning.